science

ICE (FPGA)

ICE (FPGA) is a science topic covered in the lgStudy science library. This page brings together a partial reference excerpt, illustrations, worked examples, real-world applications and a short study plan, so you can understand ICE (FPGA) rather than just read about it. In short: iCE is the brand name used for a family of low-power field-programmable gate arrays (FPGAs) produced by Lattice Semiconductor. Parts in the family are marketed with the "world's smallest FPGA" tagline, and are intended for use in portable and battery-powered devices (such as mobile phones), where they would be used to offload tasks from the device's main processor or system on chip.

Key takeaways

ICE (FPGA) belongs to science; place it in that map before memorising details.
Learn the definition first, then one example that makes the definition concrete.
Connect ICE (FPGA) to a quantity you can measure, compute or draw — that is where exam questions come from.
Reproduce the core statement of ICE (FPGA) from memory before moving on to harder problems.

Reference excerpt

iCE is the brand name used for a family of low-power field-programmable gate arrays (FPGAs) produced by Lattice Semiconductor. Parts in the family are marketed with the "world's smallest FPGA" tagline, and are intended for use in portable and battery-powered devices (such as mobile phones), where they would be used to offload tasks from the device's main processor or system on chip. By doing so, the main processor and its peripherals can enter a low-power state or be powered off entirely, potentially increasing battery life. Lattice acquired the iCE brand as part of its 2011 acquisition of SiliconBlue Technologies.

History

The iCE brand was originally used by SiliconBlue Technologies Corporation, a former Santa Clara, California-based fabless designer of integrated circuits. SiliconBlue was a start-up founded in 2005 by former employees of Actel, AMD, Lattice, Monolithic Memories, and Xilinx. Most notable among the founders was John Birkner, one of the inventors of programmable array logic. In 2006, SiliconBlue was funded with $16 million in "Series A" capital, and in June 2008 announced the iCE65 L series of devices. The devices were to be fabricated on TSMC's 65 nm CMOS process node, which SiliconBlue claimed would provide reduced power consumption compared to contemporary FPGAs from other manufacturers. In October 2008, SiliconBlue raised a further $24 million in Series B capital. In 2009, the first iCE65 L devices were shipped to customers. SiliconBlue also registered SiliconBlue Technologies (Hong Kong) Limited, which remains as a subsidiary of Lattice Semiconductor. In 2010, the lowest-end of the iCE65 P devices was announced by SiliconBlue. The devices were claimed to be as much as 30% faster than iCE65 L devices while maintaining similar power consumption. In the June of the same year, SiliconBlue closed a $15 million Series C funding round. In April 2011, SiliconBlue announced that it was to release new product families, code-named "Los Angeles" and "San Francisco," using a TSMC 40 nm process node. The production of devices on a 40 nm process node was further confirmed in June 2011, when SiliconBlue received $18 million in Series D funding to bring 40 nm devices to market. The iCE40 product family was officially released in July 2011. On 9 December 2011, SiliconBlue Technologies was acquired by Lattice Semiconductor in a $63.2 million cash buyout. As part of this buyout, Lattice received the iCE brand, manufacturing capabilities with TSMC, and a licence for various patents from Kilopass Technologies, including for its XPM one-time programmable (OTP) memory technology. In April 2012, Lattice announced that the iCE65 families would be discontinued. The iCE40 LP and HX device families entered volume production the following month. The iCE40 LP family won the Elektra Digital Semiconductor Product of the Year award for 2012. In July 2014, the iCE40 Ultra family was announced. In February 2015, Lattice launched the iCE40 UltraLite device family. The devices in this family are claimed to operate at 30% less power than those of unspecified competitors, and are claimed to be the world's smallest FPGAs, being available in 1.4×1.4 mm packages. The family won the 2015 Elektra Digital Semiconductor Product of the Year award. In December 2016, Lattice launched the iCE40 UltraPlus device family. UltraPlus devices provide additional memory, additional processing elements, and support for newer interfaces and protocols compared to previous iCE40 Ultra/UltraLite devices.

Architecture

iCE65 and iCE40 devices are constructed as an array of programmable logic blocks (PLBs), where a PLB is a block of eight logic cells. Each logic cell consists of a four-input lookup table (sometimes called a 4-LUT or LUT4) with the output connected to a D flip-flop (a 1-bit storage element). Within a PLB, each logic cell is connected to the following and preceding cell by carry logic, intended to improve the performance of constructs such as adders and subtractors. Interspersed with PLBs are blocks of RAM, each four kilobits in size. The number of RAM blocks varies depending on the device. Compared to LUT6-based architectures (such as Xilinx 7-series devices and Altera Stratix devices), a LUT4-based device is unable to implement as-complex logic functions with the same number of logic cells. For example, a logic function with seven inputs could be implemented in eight LUT4s or two LUT6s. iCE devices use volatile SRAM to store configuration data. As a result, the data must be loaded onto the device each time power is lost. All iCE devices support loading configuration data from a programmer, from an external flash memory chip, or, with the exception of iCE40 LM devices, from a so-called NVCM, or non-volatile configuration memory. The NVCM is a one-time-programmable (OTP) memory integrated into the FPGA to negate the need for an external memory chip. Lattice claims that using the NVCM can improve design security by making reverse engineering more difficult. The I/O pins on iCE devices are separated into up to four banks. On some devices each bank has its own power-supply pin (labelled VCCIO), allowing the logic-high voltage level of the I/O bank to be adjusted. Configurable I/O voltage levels are used by iCE devices to allow support for multiple interface standards with voltage levels between 1.8 V and 3.3 V, such as LVDS. iCE65 devices also listed being able to support SSTL through this method.

Development

iCE FPGAs, as with most FPGAs and CPLDs, are typically designed for using a hardware description language (HDL), which describes an electronic circuit. Lattice iCEcube2, the IDE provided by Lattice for developing on their FPGAs, supports the VHDL and Verilog languages, as well as the EDIF format.

… excerpt ends here. Continue reading the full article.

Illustrations

ICE (FPGA): The architecture of iCE40 LP and HX1K devices. — The architecture of iCE40 LP and HX1K devices.

Worked examples

Example 1 — a first encounter with ICE (FPGA)

Start with the simplest possible case. Write down what ICE (FPGA) claims or describes in one sentence, then invent the smallest concrete situation in which that sentence is true. In science, the smallest case is usually a single object, a single equation or a single measurement. Check that every symbol or term in your sentence has a meaning in that case.

Example 2 — changing one variable

Take the situation from Example 1 and change exactly one quantity: double it, halve it, or set it to zero. Predict what should happen to ICE (FPGA) before you calculate. Comparing your prediction with the result is the fastest way to find out whether you understand the idea or only the words.

Example 3 — an exam-style question

Typical questions about ICE (FPGA) ask you to (a) state it precisely, (b) apply it to given data, and (c) explain a limitation. Practise writing all three answers in under five minutes; the third part is what separates a full-mark answer from an average one.

Applications of ICE (FPGA)

In research: ICE (FPGA) appears in science research whenever the underlying quantities have to be modelled precisely. Papers usually cite it as a starting assumption and then explore where it breaks down.
In technology and industry: Engineering practice reuses ICE (FPGA) in design rules, simulations and safety margins. Knowing the idea lets you read a specification sheet and understand why the numbers look the way they do.
In the classroom: ICE (FPGA) is common in secondary-school and first-year university syllabi. It links to neighbouring topics Field-programmable gate arrays, so understanding it makes those chapters shorter.
In everyday life: Look for ICE (FPGA) outside the textbook — in sport, cooking, traffic, electronics or the sky above you. An example you found yourself is remembered far longer than one you were given.

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How to study ICE (FPGA) in 20 minutes

Read the reference excerpt below once, without taking notes.
Close the page and write down what ICE (FPGA) means in your own words.
Compare your version with the excerpt and mark what you missed.
Work through the three examples above with pen and paper.
Explain ICE (FPGA) out loud to somebody else — or to Teacher Smith in the lgStudy chat.

Frequently asked questions

What is ICE (FPGA) in simple terms?

Why does ICE (FPGA) matter?

Because it connects several science ideas at once: it gives you a definition you can apply, a quantity you can calculate, and a way to check whether a result is plausible.

How should I study ICE (FPGA)?

Read the excerpt, restate it from memory, then work through the examples and applications listed on this page. The five-step study plan above takes about twenty minutes.

What does this page cover?

It gives you a compact reference excerpt plus original lgStudy explanations, examples, applications and study material on ICE (FPGA).