A logarithmic resistor ladder is an electronic circuit, composed of a series of resistors and switches, designed to create an attenuation from an input to an output signal, where the logarithm of the attenuation ratio is proportional to a binary number that represents the state of the switches. The logarithmic behavior of the circuit is its main differentiator in comparison with digital-to-analog converters (DACs) in general, and traditional R-2R Ladder networks specifically. Logarithmic attenuation is desired in situations where a large dynamic range needs to be handled. The circuit described in this article is applied in audio devices, since humans perceive sound on a logarithmic scale.
Logarithmic input/output behavior As in digital-to-analog converters, a binary number is applied to the ladder network, whose N bits are treated as representing an integer value:
C o d e V a l u e = ∑ i = 1 N s i ⋅ 2 i − 1 {\displaystyle \mathrm {CodeValue} =\sum _{i=1}^{N}s_{i}\cdot 2^{i-1}}
where s i {\displaystyle s_{i}} is 0 or 1 depending on the state of the ith switch. For comparison, recall a conventional linear DAC or R-2R network produces an output voltage signal of:
V o u t = V i n ⋅ c ⋅ ( C o d e V a l u e + d ) {\displaystyle V_{out}=V_{in}\cdot c\cdot (\mathrm {CodeValue} +d)}
where c {\displaystyle c} and d {\displaystyle d} are design constants and where V i n {\displaystyle V_{in}} typically is a constant reference voltage (or is a variable input voltage for a multiplying DAC.) In contrast, the logarithmic ladder network discussed in this article creates a behavior as:
log ( V o u t / V i n ) = c ⋅ C o d e V a l u e {\displaystyle \log(V_{out}/V_{in})=c\cdot \mathrm {CodeValue} }
which can also be expressed as V i n {\displaystyle V_{in}} multiplied by some base α {\displaystyle \alpha } raised to the power of the code value:
V o u t = V i n ⋅ α C o d e V a l u e {\displaystyle V_{out}=V_{in}\cdot \alpha ^{\mathrm {CodeValue} }}
where c = log ( α ) . {\displaystyle c=\log(\alpha )\,.}
Circuit implementation
This example circuit is composed of 4 stages, numbered 1 to 4, and includes a source resistance Rsource and load resistance Rload. Each stage i has a designed input-to-output voltage attenuation Ratioi as:
R a t i o i = if s w i then α 2 i − 1 else 1 {\displaystyle Ratio_{i}={\text{if}}\;sw_{i}\;{\text{then}}\;\alpha ^{2^{i-1}}\;{\text{else}}\;1}
For logarithmic scaled attenuators, it is common practice to equivalently express their attenuation in decibels:
d B ( R a t i o i ) = 20 log 10 α 2 i − 1 = 2 i − 1 ⋅ 20 ⋅ log 10 α {\displaystyle dB(Ratio_{i})=20\log _{10}\alpha ^{2^{i-1}}=2^{i-1}\cdot 20\cdot \log _{10}\alpha } for i = 1.. N {\displaystyle i=1..N} and s w i = 1 {\displaystyle sw_{i}=1}
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