In electronics, a multiplexer (or mux; spelled sometimes as multiplexor), also known as a data selector, is a device that selects between several analog or digital input signals and forwards the selected input to a single output line. The selection is directed by a separate set of digital inputs known as select lines. A multiplexer of 2 n {\displaystyle 2^{n}} inputs has n {\displaystyle n} select lines, which are used to select which input line to send to the output. A multiplexer makes it possible for several input signals to share one device or resource, for example, one analog-to-digital converter or one communications transmission medium, instead of having one device per input signal. Multiplexers can also be used to implement Boolean functions of multiple variables. Conversely, a demultiplexer (or demux) is a device that takes a single input signal and selectively forwards it to one of several output lines. A multiplexer is often used with a complementary demultiplexer on the receiving end. An electronic multiplexer can be considered as a multiple-input, single-output switch, and a demultiplexer as a single-input, multiple-output switch. The schematic symbol for a multiplexer is an isosceles trapezoid with the longer parallel side containing the input pins and the short parallel side containing the output pin. The schematic on the right shows a 2-to-1 multiplexer on the left and an equivalent switch on the right. The s e l {\displaystyle sel} wire connects the desired input to the output.
Applications
Multiplexers are part of computer systems to select data from a specific source, be it a memory chip or a hardware peripheral. A computer uses multiplexers to control the data and address buses, allowing the processor to select data from multiple data sources. In digital communications, multiplexers allow several connections over a single channel by connecting the multiplexer's single output to the demultiplexer's single input (time-division multiplexing). The image to the right demonstrates this benefit. In this case, the cost of implementing separate channels for each data source is higher than the cost and inconvenience of providing the multiplexing/demultiplexing functions. At the receiving end of the data link, a complementary demultiplexer is usually required to break the single data stream back down into the original streams. In some cases, the far-end system may have functionality greater than a simple demultiplexer, and while the demultiplexing still occurs technically, it may never be implemented discretely. This would be the case when, for instance, a multiplexer serves a number of IP network users; and then feeds directly into a router, which immediately reads the content of the entire link into its routing processor; and then does the demultiplexing in memory from where it will be converted directly into IP sections. Often, a multiplexer and demultiplexer are combined into a single piece of equipment, which is simply referred to as a multiplexer. Both circuit elements are needed at both ends of a transmission link because most communications systems transmit in both directions. In analog circuit design, a multiplexer is a special type of analog switch that connects one signal selected from several inputs to a single output.
Digital multiplexers In digital circuit design, the selector wires are of digital value. In the case of a 2-to-1 multiplexer, a logic value of 0 would connect I 0 {\displaystyle I_{0}} to the output, while a logic value of 1 would connect I 1 {\displaystyle I_{1}} to the output. In larger multiplexers, the number of selector pins is equal to ⌈ log 2 ( n ) ⌉ {\displaystyle \left\lceil \log _{2}(n)\right\rceil } where n {\displaystyle n} is the number of inputs. For example, 9 to 16 inputs would require no fewer than 4 selector pins and 17 to 32 inputs would require no fewer than 5 selector pins. The binary value expressed on these selector pins determines the selected input pin. A 2-to-1 multiplexer has a Boolean equation where A {\displaystyle A} and B {\displaystyle B} are the two inputs, S 0 {\displaystyle S_{0}} is the selector input, and Z {\displaystyle Z} is the output:
Z = ( A ∧ ¬ S 0 ) ∨ ( B ∧ S 0 ) {\displaystyle Z=(A\wedge \neg S_{0})\vee (B\wedge S_{0})} or
Z = ( A ⋅ S 0 ¯ ) + ( B ⋅ S 0 ) {\displaystyle Z=(A\cdot {\overline {S_{0}}})+(B\cdot S_{0})}
Which can be expressed as a truth table:
Or, in simpler notation:
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