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NAND logic

NAND logic is a science topic covered in the lgStudy science library. This page brings together a partial reference excerpt, illustrations, worked examples, real-world applications and a short study plan, so you can understand NAND logic rather than just read about it. In short: The NAND Boolean function has the property of functional completeness. This means that any Boolean expression can be re-expressed by an equivalent expression utilizing only NAND operations.

NAND logic — main illustration
NAND logic — illustration

Key takeaways

  • NAND logic belongs to science; place it in that map before memorising details.
  • Learn the definition first, then one example that makes the definition concrete.
  • Connect NAND logic to a quantity you can measure, compute or draw — that is where exam questions come from.
  • Reproduce the core statement of NAND logic from memory before moving on to harder problems.

Reference excerpt

The NAND Boolean function has the property of functional completeness. This means that any Boolean expression can be re-expressed by an equivalent expression utilizing only NAND operations. For example, the function NOT(x) may be equivalently expressed as NAND(x,x). In the field of digital electronic circuits, this implies that it is possible to implement any Boolean function using just NAND gates. The mathematical proof for this was published by Henry M. Sheffer in 1913 in the Transactions of the American Mathematical Society (Sheffer 1913). A similar case applies to the NOR function, and this is referred to as NOR logic.

NAND

A NAND gate is an inverted AND gate. It has the following truth table:

In CMOS logic, if both of the A and B inputs are high, then both the NMOS transistors (bottom half of the diagram) will conduct, neither of the PMOS transistors (top half) will conduct, and a conductive path will be established between the output and Vss (ground), bringing the output low. If both of the A and B inputs are low, then neither of the NMOS transistors will conduct, while both of the PMOS transistors will conduct, establishing a conductive path between the output and Vdd (voltage source), bringing the output high. If either of the A or B inputs is low, one of the NMOS transistors will not conduct, one of the PMOS transistors will, and a conductive path will be established between the output and Vdd (voltage source), bringing the output high. As the only configuration of the two inputs that results in a low output is when both are high, this circuit implements a NAND (NOT AND) logic gate.

Making other gates by using NAND gates A NAND gate is a universal gate, meaning that any other gate can be represented as a combination of NAND gates.

NOT

A NOT gate is made by joining the inputs of a NAND gate together. Since a NAND gate is equivalent to an AND gate followed by a NOT gate, joining the inputs of a NAND gate leaves only the NOT gate.

AND

An AND gate is made by inverting the output of a NAND gate as shown below.

OR

If the truth table for a NAND gate is examined or by applying De Morgan's laws, it can be seen that if any of the inputs are 0, then the output will be 1. To be an OR gate, however, the output must be 1 if any input is 1. Therefore, if the inputs are inverted, any high input will trigger a high output.

NOR

A NOR gate is an OR gate with an inverted output. Output is high when neither input A nor input B is high.

XOR

An XOR gate is made by connecting four NAND gates as shown below. This construction entails a propagation delay three times that of a single NAND gate.

Alternatively, an XOR gate is made by considering the disjunctive normal form A ⋅ B ¯ + A ¯ ⋅ B {\displaystyle A\cdot {\overline {B}}+{\overline {A}}\cdot B} , noting from de Morgan's law that a NAND gate is an inverted-input OR gate. This construction uses five gates instead of four.

XNOR

An XNOR gate is made by considering the disjunctive normal form A ⋅ B + A ¯ ⋅ B ¯ {\displaystyle A\cdot B+{\overline {A}}\cdot {\overline {B}}} , noting from de Morgan's law that a NAND gate is an inverted-input OR gate. This construction entails a propagation delay three times that of a single NAND gate and uses five gates.

Alternatively, the 4-gate version of the XOR gate can be used with an inverter. This construction has a propagation delay four times (instead of three times) that of a single NAND gate.

MUX A multiplexer or a MUX gate is a three-input gate that uses one of the inputs, called the selector bit, to select one of the other two inputs, called data bits, and outputs only the selected data bit.

DEMUX A demultiplexer performs the opposite function of a multiplexer: It takes a single input and channels it to one of two possible outputs according to a selector bit that specifies which output to choose.

See also CMOS transistor structures and chip deposition geometries that produce NAND logic elements Functional completeness NOR logic – like NAND gates, NOR gates are also universal gates Sheffer stroke – other name

References

External links TTL NAND and AND gates – All About Circuits Drive XOR using either NAND gates or NOR gates. at the Wayback Machine (archived June 11, 2024) NandGame – a game about building a computer using only NAND gates

Illustrations

NAND logic: A CMOS transistor NAND element. Vdd denotes positive voltage.
A CMOS transistor NAND element. Vdd denotes positive voltage.
NAND logic illustration
NAND logic illustration
NAND logic illustration
NAND logic illustration

Worked examples

Example 1 — a first encounter with NAND logic

Start with the simplest possible case. Write down what NAND logic claims or describes in one sentence, then invent the smallest concrete situation in which that sentence is true. In science, the smallest case is usually a single object, a single equation or a single measurement. Check that every symbol or term in your sentence has a meaning in that case.

Example 2 — changing one variable

Take the situation from Example 1 and change exactly one quantity: double it, halve it, or set it to zero. Predict what should happen to NAND logic before you calculate. Comparing your prediction with the result is the fastest way to find out whether you understand the idea or only the words.

Example 3 — an exam-style question

Typical questions about NAND logic ask you to (a) state it precisely, (b) apply it to given data, and (c) explain a limitation. Practise writing all three answers in under five minutes; the third part is what separates a full-mark answer from an average one.

Applications of NAND logic

In research
NAND logic appears in science research whenever the underlying quantities have to be modelled precisely. Papers usually cite it as a starting assumption and then explore where it breaks down.
In technology and industry
Engineering practice reuses NAND logic in design rules, simulations and safety margins. Knowing the idea lets you read a specification sheet and understand why the numbers look the way they do.
In the classroom
NAND logic is common in secondary-school and first-year university syllabi. It links to neighbouring topics Logic gates, so understanding it makes those chapters shorter.
In everyday life
Look for NAND logic outside the textbook — in sport, cooking, traffic, electronics or the sky above you. An example you found yourself is remembered far longer than one you were given.
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How to study NAND logic in 20 minutes

  1. Read the reference excerpt below once, without taking notes.
  2. Close the page and write down what NAND logic means in your own words.
  3. Compare your version with the excerpt and mark what you missed.
  4. Work through the three examples above with pen and paper.
  5. Explain NAND logic out loud to somebody else — or to Teacher Smith in the lgStudy chat.

Frequently asked questions

What is NAND logic in simple terms?

The NAND Boolean function has the property of functional completeness. This means that any Boolean expression can be re-expressed by an equivalent expression utilizing only NAND operations.

Why does NAND logic matter?

Because it connects several science ideas at once: it gives you a definition you can apply, a quantity you can calculate, and a way to check whether a result is plausible.

How should I study NAND logic?

Read the excerpt, restate it from memory, then work through the examples and applications listed on this page. The five-step study plan above takes about twenty minutes.

What does this page cover?

It gives you a compact reference excerpt plus original lgStudy explanations, examples, applications and study material on NAND logic.

Tags

  • Logic gates

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