OR-AND-invert gates, or OAI-gates, are logic gates comprising OR gates followed by a NAND gate. They can be efficiently implemented in logic families like CMOS and TTL. They are dual to AND-OR-invert gates.
Overview OR-AND-invert gates implement the inverted product of sums. n {\displaystyle n} groups of m i {\displaystyle m_{i}} , m i ≥ 1 , i = 1 … n {\displaystyle m_{i}\geq 1,i=1\ldots n} input signals combined with OR, and the results then combined with NAND.
Examples
2-1 OAI-gate
A 2-1-OAI gate realizes the following function:
Y = ( A ∨ B ) ∧ C ¯ {\displaystyle Y={\overline {(A\lor B)\land C}}}
2-2 OAI gate A 2-2-OAI gate realizes the following function:
Y = ( A ∨ B ) ∧ ( C ∨ D ) ¯ {\displaystyle Y={\overline {(A\lor B)\land (C\lor D)}}}
Realization
OAI-gates can efficiently be implemented as complex gates. An example of a 3-1 OAI-gate is shown in the figure below.
Examples of use One possibility of implementing an XOR gate is by using a 2-2-OAI-gate with non-inverted and inverted inputs.
References



