A quantum field-effect transistor (QFET) or quantum-well field-effect transistor (QWFET) is a type of MOSFET (metal–oxide–semiconductor field-effect transistor) that takes advantage of quantum tunneling to greatly increase the speed of transistor operation by eliminating the traditional transistor's area of electron conduction which typically causes carriers to slow down by a factor of 3000. The result is an increase in logic speed by a factor of 10 with a simultaneous reduction in component power requirement and size also by a factor of 10. It achieves these things through a manufacturing process known as rapid thermal processing (RTP) that uses ultrafine layers of construction materials. The letters "QFET" also currently exist as a trademarked name of a series of MOSFETs produced by Fairchild Semiconductor (compiled in November 2015) which contain a proprietary double-diffused metal–oxide–semiconductor (DMOS) technology but which are not, in fact, quantum-based (the Q in this case standing for "quality").
Structure and device operation Modern examples of quantum field-effect transistors integrate structures traditional to conventional MOSFETs and utilize many of the same materials. MOSFET transistors consist of dielectric materials, such as SiO2, and metal gates. The metal gates are insulated from the gate dielectric layer, which leads to a very high input resistance. Consisting of three terminals, the source (or input), drain (or output), and gate, MOSFETs can control current flow via an applied voltage (or lack thereof) to the gate terminal, which alters the potential barrier between the layers and enables (or disables) charge flow. Source and drain terminals are connected to doped regions of the MOSFET, insulated by the body region. These are either p or n type regions, with both terminals being of the same type and opposite to that of the body type. If the MOSFET is a n-channel MOSFET, both source and drain regions are n+ and the body is a p region. If the MOSFET is a p-channel MOSFET, both source and drain regions are p+ and the body is a n region. In a n-channel MOSFET electrons carry the charge through the source region, and holes carry the charges in the p-channel MOSFET source. FET structures are typically constructed gradually, layer by layer, using a variety of techniques such as molecular-beam epitaxy, liquid-phase epitaxy, and vapor-phase epitaxy, an example being chemical vapor deposition. Typical MOSFETs are constructed on the micron scale. Wet chemical etching can be used to create layers of thickness 3 μm or larger, while dry etching techniques can be used to achieve layers on the nanometer scale. When layer thickness approaches 50 nanometers or less, the de Broglie wavelength of the layer approaches that of a thermalized electron, and conventional energy-momentum relations for bulk semiconductors are no longer operational. Ultrathin semiconductor layers are used in the production of QFETs, whose bandgaps are smaller than those of the surrounding materials. In the case of a one-dimensional quantum well QFET, a nanoscale semiconductor layer is grown between two insulating layers. The semiconductor layer has a thickness d, and the electron charge carriers are trapped in a potential well. These electrons, and their corresponding holes, have discrete energy levels that are found by solving the time-independent Schrödinger equation, as shown:
E q = ℏ 2 ( q π / d ) 2 2 m , q = 1 , 2 , 3 , . . . {\displaystyle E_{q}={\hbar ^{2}(q\pi /d)^{2} \over 2m},q=1,2,3,...}
The charge carriers can be activated (or deactivated) by applying a potential to the gate terminal that matches a corresponding energy level. These energy levels depend on the thickness of the semiconductor layer and the material properties. A promising semiconductor candidate for QFET implementation, InGaAs, has a de Broglie wavelength of around 50 nanometers. Larger gaps between energy levels can be achieved by lowering the thickness d of the layer. In the case of InGaAs, layer lengths of around 20 nanometers have been achieved. In practice, three-dimensional quantum wells are produced, with the dimensions of the plane of the layer, d2 and d3, being much larger in relative size. The corresponding electron energy-momentum relation is described by
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