computer science

Reduction of summands

Reduction of summands is a computer science topic covered in the lgStudy science library. This page brings together a partial reference excerpt, illustrations, worked examples, real-world applications and a short study plan, so you can understand Reduction of summands rather than just read about it. In short: In binary multiplication, reduction of summands refers to a class of fast multiplication approaches in which a matrix of partial products (summands) is first generated and then compressed through a sequence of reduction stages until only two rows remain. These two rows are subsequently combined using a fast parallel adder to produce the final result.

Key takeaways

Reduction of summands belongs to computer science; place it in that map before memorising details.
Learn the definition first, then one example that makes the definition concrete.
Connect Reduction of summands to a quantity you can measure, compute or draw — that is where exam questions come from.
Reproduce the core statement of Reduction of summands from memory before moving on to harder problems.

Reference excerpt

In binary multiplication, reduction of summands refers to a class of fast multiplication approaches in which a matrix of partial products (summands) is first generated and then compressed through a sequence of reduction stages until only two rows remain. These two rows are subsequently combined using a fast parallel adder to produce the final result. The various algorithms in this class differ primarily in how the summands are grouped and reduced, and may employ either bit-parallel or row-parallel reduction techniques. Representative examples include Dadda’s parallel counters and Wallace tree based methods.

Steps

Production of summands In binary multiplication, each row of the summands will be either zero or one of the numbers to be multiplied. Consider the following:

1001 x1010 ----- 0000 1001 0000 1001

The second and fourth row of the summands are equivalent to the first term. Production of the summands requires a simple AND gate for each summand. Given enough AND gates, the time to produce the summands will be one cycle of the arithmetic logic unit.

Reduction of summands The summands are reduced using a common 1-bit full adder that accepts two 1-bit terms and a carry-in bit. It creates a sum and a carry-out. The full adders are arranged such that the sum remains in the same column of summands, but the carry-out is shifted left. In each round of reduction, three bits in a single column are used as the two terms and carry-in for the full adder, producing a single sum bit for the column. This reduces the bits in the column by a factor of 3. However, the column to the right will shift over carry-out bits, increasing the bits in the column by a third of the number of rows of summands. At worst, the reduction will be 2/3 the number of rows per round of reduction. The following shows how the first round of reduction is performed. Note that all "empty" positions of the summands are considered to be zero (a . is used here as indicator of the "assumed zero values"). In each row, the top three bits are the three inputs to the full adder (two terms and carry-in). The sum is placed in the top bit of the column. The carry-out is placed in the second row of the column to the left. The bottom bit is a single feed into an adder. The sum of this adder is placed in the third row of the column. Carry-out is ignored as it will always be zero, but by design it would be placed in the fourth row of the column to the left. For design, rows 1, 3, 5, ... (counting from the top) are filled with sums from the column itself. Rows 2, 4, 6, ... are filled with carry-out values from the column to the right.

1011 x0110 ----- ...0000 ..1011. .1011.. 0000... ------- 0111010 000100. 00000..

Reduction is performed again in exactly the same way. This time, only the top three rows of summands are of interest because all other summands must be zero.

0111010 000100. 00000.. ------- 0110010 001000.

When there are only two significant rows of summands, the reduction cycles end. A basic full adder normally requires three cycles of the arithmetic logic unit. Therefore, each cycle of reduction is commonly 3 cycles long.

Summation When there are only two rows of summands remaining, they are added using a fast adder. There are many designs of fast adders, any of which may be used to complete this algorithm.

Calculation time The calculation time for the reduction of summands algorithm is: T = 1Δt + r3Δt + FA (where r is the number of reduction cycles and FA is the time for the fast adder at the end of the algorithm).

References

Worked examples

Example 1 — a first encounter with Reduction of summands

Start with the simplest possible case. Write down what Reduction of summands claims or describes in one sentence, then invent the smallest concrete situation in which that sentence is true. In computer science, the smallest case is usually a single object, a single equation or a single measurement. Check that every symbol or term in your sentence has a meaning in that case.

Example 2 — changing one variable

Take the situation from Example 1 and change exactly one quantity: double it, halve it, or set it to zero. Predict what should happen to Reduction of summands before you calculate. Comparing your prediction with the result is the fastest way to find out whether you understand the idea or only the words.

Example 3 — an exam-style question

Typical questions about Reduction of summands ask you to (a) state it precisely, (b) apply it to given data, and (c) explain a limitation. Practise writing all three answers in under five minutes; the third part is what separates a full-mark answer from an average one.

Applications of Reduction of summands

In research: Reduction of summands appears in computer science research whenever the underlying quantities have to be modelled precisely. Papers usually cite it as a starting assumption and then explore where it breaks down.
In technology and industry: Engineering practice reuses Reduction of summands in design rules, simulations and safety margins. Knowing the idea lets you read a specification sheet and understand why the numbers look the way they do.
In the classroom: Reduction of summands is common in secondary-school and first-year university syllabi. It links to neighbouring topics Computer arithmetic, so understanding it makes those chapters shorter.
In everyday life: Look for Reduction of summands outside the textbook — in sport, cooking, traffic, electronics or the sky above you. An example you found yourself is remembered far longer than one you were given.

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How to study Reduction of summands in 20 minutes

Read the reference excerpt below once, without taking notes.
Close the page and write down what Reduction of summands means in your own words.
Compare your version with the excerpt and mark what you missed.
Work through the three examples above with pen and paper.
Explain Reduction of summands out loud to somebody else — or to Teacher Smith in the lgStudy chat.

Frequently asked questions

What is Reduction of summands in simple terms?

Why does Reduction of summands matter?

Because it connects several computer science ideas at once: it gives you a definition you can apply, a quantity you can calculate, and a way to check whether a result is plausible.

How should I study Reduction of summands?

Read the excerpt, restate it from memory, then work through the examples and applications listed on this page. The five-step study plan above takes about twenty minutes.

What does this page cover?

It gives you a compact reference excerpt plus original lgStudy explanations, examples, applications and study material on Reduction of summands.