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Simple Bus Architecture

Simple Bus Architecture is a computer science topic covered in the lgStudy science library. This page brings together a partial reference excerpt, illustrations, worked examples, real-world applications and a short study plan, so you can understand Simple Bus Architecture rather than just read about it. In short: The Simple Bus Architecture (SBA) is a form of computer architecture. It is made up software tools and intellectual property cores (IP core) interconnected by buses using simple and clear rules, that allow the implementation of an embedded system (SoC).

Simple Bus Architecture — main illustration
Simple Bus Architecture — illustration

Key takeaways

  • Simple Bus Architecture belongs to computer science; place it in that map before memorising details.
  • Learn the definition first, then one example that makes the definition concrete.
  • Connect Simple Bus Architecture to a quantity you can measure, compute or draw — that is where exam questions come from.
  • Reproduce the core statement of Simple Bus Architecture from memory before moving on to harder problems.

Reference excerpt

The Simple Bus Architecture (SBA) is a form of computer architecture. It is made up software tools and intellectual property cores (IP core) interconnected by buses using simple and clear rules, that allow the implementation of an embedded system (SoC). Basic templates are provided to accelerate design. The VHDL code that implements this architecture is portable. The SBA allows to accelerate the development of reconfigurable virtual instrumentation systems. Science and engineering are based on measurements and comparisons, and each field requires a set of both standard and specialised (ad hoc) instruments to make these measurements. With the advent of powerful, low-cost, state-of-the-art field-programmable gate arrays (FPGAs), it is easier to provide virtual, reconfigurable, on-demand instrumentation. FPGAs have grown in size and sophistication over the years and are now used in markets as diverse as telecommunications, consumer electronics, industrial and medical, to name a few. Many FPGA vendors now include additional features in their devices, such as integrated processor cores, memory, high-speed input/output (I/O) interfaces, etc. These additional capabilities, along with their low cost per unit, have made FPGAs increasingly popular for digital signal processing (DSP) applications. However, notwithstanding the above, arguably the most important feature of FPGAs that has led to their rapid rise in popularity and use is their 'field programmability' or reconfigurability. Other features that make FPGAs very attractive are their high cell density and high level of parallelism, making them an ideal choice for computationally intensive applications that can be parallelized. The Simple Bus Architecture, or SBA, allows different components or blocks to be interconnected to each other in a practical and simple way, allowing the user to optimise time when carrying out their projects. It also sacrifices the complexities of other implementations in order to easily introduce the SoC concept into the FPGA, so it has an inherent educational value. The SBA is intended to be a general purpose interface; as such, it defines the data exchange between standard IP core modules. It is divided into three main block types: master or system controller (SBA controller), slave cores and bus support cores (address decoder, bus adapters, clock generators, etc.).

Components

Master core The master core is a finite-state machine (FSM) and performs basic data flow and processing, similar to a microprocessor, but with lower consumption of logic resources. It is the main block, as it is here that an address is assigned for each action to be performed. It is also in charge of deciding the order of these actions (it decides what to execute first and what to execute next). This addressing communicates directly with the Address Decoder.

Address decoder Assigns each slave core a position in the address map and enables these cores through the chip enabler/selector.

Slave cores Slaves are IP cores that provide some specific functionality, from data processing to serving as adapters between the SoC and devices external to the chip. In a system with multiple slaves, each slave has an established portion of the address map.

Wishbone SBA is an application and a simplified version of the Wishbone specification. SBA implements the minimum essential subset of the Wishbone signals interface. It can be connected with simple Wishbone IP cores. SBA defines three types of cores: masters, slaves, and auxiliaries. Several slave IP cores were developed following the SBA architecture, many to implement virtual instruments.

Applications The SBA has been used to build differents ad hoc instruments like a wave generator, curve tracer, PWM controllers, UAV instrumentation, Bioelectrical signal processing and many other electronic instruments.

References

Illustrations

Simple Bus Architecture: SBA Master code example
SBA Master code example
Simple Bus Architecture: SBA Master IP Core Interface
SBA Master IP Core Interface
Simple Bus Architecture: SBA Slave IP Core Interface
SBA Slave IP Core Interface
Simple Bus Architecture: SBA Address Space IP Core Interface
SBA Address Space IP Core Interface
Simple Bus Architecture: SBA basic block diagram
SBA basic block diagram

Worked examples

Example 1 — a first encounter with Simple Bus Architecture

Start with the simplest possible case. Write down what Simple Bus Architecture claims or describes in one sentence, then invent the smallest concrete situation in which that sentence is true. In computer science, the smallest case is usually a single object, a single equation or a single measurement. Check that every symbol or term in your sentence has a meaning in that case.

Example 2 — changing one variable

Take the situation from Example 1 and change exactly one quantity: double it, halve it, or set it to zero. Predict what should happen to Simple Bus Architecture before you calculate. Comparing your prediction with the result is the fastest way to find out whether you understand the idea or only the words.

Example 3 — an exam-style question

Typical questions about Simple Bus Architecture ask you to (a) state it precisely, (b) apply it to given data, and (c) explain a limitation. Practise writing all three answers in under five minutes; the third part is what separates a full-mark answer from an average one.

Applications of Simple Bus Architecture

In research
Simple Bus Architecture appears in computer science research whenever the underlying quantities have to be modelled precisely. Papers usually cite it as a starting assumption and then explore where it breaks down.
In technology and industry
Engineering practice reuses Simple Bus Architecture in design rules, simulations and safety margins. Knowing the idea lets you read a specification sheet and understand why the numbers look the way they do.
In the classroom
Simple Bus Architecture is common in secondary-school and first-year university syllabi. It links to neighbouring topics Computer buses, so understanding it makes those chapters shorter.
In everyday life
Look for Simple Bus Architecture outside the textbook — in sport, cooking, traffic, electronics or the sky above you. An example you found yourself is remembered far longer than one you were given.
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How to study Simple Bus Architecture in 20 minutes

  1. Read the reference excerpt below once, without taking notes.
  2. Close the page and write down what Simple Bus Architecture means in your own words.
  3. Compare your version with the excerpt and mark what you missed.
  4. Work through the three examples above with pen and paper.
  5. Explain Simple Bus Architecture out loud to somebody else — or to Teacher Smith in the lgStudy chat.

Frequently asked questions

What is Simple Bus Architecture in simple terms?

The Simple Bus Architecture (SBA) is a form of computer architecture. It is made up software tools and intellectual property cores (IP core) interconnected by buses using simple and clear rules, that allow the implementation of an embedded system (SoC).

Why does Simple Bus Architecture matter?

Because it connects several computer science ideas at once: it gives you a definition you can apply, a quantity you can calculate, and a way to check whether a result is plausible.

How should I study Simple Bus Architecture?

Read the excerpt, restate it from memory, then work through the examples and applications listed on this page. The five-step study plan above takes about twenty minutes.

What does this page cover?

It gives you a compact reference excerpt plus original lgStudy explanations, examples, applications and study material on Simple Bus Architecture.

Tags

  • Computer buses

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