engineering

Small outline integrated circuit

Small outline integrated circuit is a engineering topic covered in the lgStudy science library. This page brings together a partial reference excerpt, illustrations, worked examples, real-world applications and a short study plan, so you can understand Small outline integrated circuit rather than just read about it. In short: A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs.

Key takeaways

Small outline integrated circuit belongs to engineering; place it in that map before memorising details.
Learn the definition first, then one example that makes the definition concrete.
Connect Small outline integrated circuit to a quantity you can measure, compute or draw — that is where exam questions come from.
Reproduce the core statement of Small outline integrated circuit from memory before moving on to harder problems.

Reference excerpt

A small outline integrated circuit (SOIC) is a surface-mounted integrated circuit (IC) package which occupies an area about 30–50% less than an equivalent dual in-line package (DIP), with a typical thickness being 70% less. They are generally available in the same pin-outs as their counterpart DIP ICs. The convention for naming the package is SOIC or SO followed by the number of pins. For example, a 14-pin 4011 would be housed in an SOIC-14 or SO-14 package.

JEDEC and JEITA/EIAJ standards Small-outline packages are an industry standard name that refers to packages with outline dimensions corresponding to specific drawings from either the JEDEC or JEITA standards:

JEDEC: MS-012 PLASTIC DUAL SMALL OUTLINE GULL WING, 1.27 MM PITCH PACKAGE, 3.9 MM BODY WIDTH. MS-013 VERY THICK PROFILE, PLASTIC SMALL OUTLINE FAMILY, 1.27 MM PITCH, 7.50 MM BODY WIDTH. JEITA (previously EIAJ, which term some vendors still use): Semiconductor Device Packages. (EIAJ Type II is 5.3 mm body width, and slightly thicker and longer than JEDEC MS-012.) ED-7311 defines the nominal 3.9mm x 4.9mm, 1.27mm pitch, 8-pin P-SOP package (approximately equivalent to the JEDEC MS-012AA) as P-SOP08-03.90x04.90-1.27, using the ED-7303B naming convention. It indicates P-SOP08-0225-1.27 as an outdated name for the same outline. Note that because of this, SOIC is not specific enough of a term to describe parts which are interchangeable. Many electronic retailers will list parts in either package as SOIC whether they are referring to the JEDEC or JEITA/EIAJ standards. The wider JEITA/EIAJ packages are more common with higher pin count ICs, but there is no guarantee that an SOIC package with any number of pins will be either one or the other. However, at least Texas Instruments and Fairchild Semiconductor consistently refer to JEDEC 3.9 and 7.5 mm width parts as "SOIC" and to EIAJ Type II 5.3 mm width parts as "SOP".

General package characteristics The SOIC package is shorter and narrower than DIP, the side-to-side pitch being 6 mm for an SOIC-14 (from lead tip to lead tip), and the body width being 3.9 mm. These dimensions differ depending on the SOIC in question, and there are several variants. This package has "gull wing" leads protruding from the two long sides and a lead spacing of 0.050 in (1.27 mm).

SOIC (JEDEC) The picture below shows the general shape of a SOIC narrow package, with major dimensions. The values of these dimensions (in millimetres) for common SOICs is shown in the table.

SOIC-8 SOIC-8 almost always refers to the JEDEC MS-012AA / JEITA P-SOP08-03.90x04.90-1.27 package outlines. Different manufacturers issue drawings of their internal package standards that (approximately) conform to the official dimensions from JEDEC and JEITA. Some examples are given below:

Texas Instruments' D0008A (SMALL OUTLINE INTEGRATED CIRCUIT) Analog Devices' R-8 (8-Lead Standard Small Outline Package [SOIC_N] Narrow Body) NXP's SOT96-4 (8LD SOIC NARROW BODY) Diodes' SO-8 (Standard B) Infineon's PG-DSO-8-803

SOP (JEITA/EIAJ) These are sometimes called "wide SOIC", as opposed to the narrower JEDEC MS-012, but they in turn are narrower than the JEDEC MS-013, which may also be called "wide SOIC".

Next to the narrow SOIC package (commonly represented as SOx_N or SOICx_N, where x is the number of pins), there's also the wide (or sometimes called extended) version. This package is commonly represented as SOx_W or SOICx_W. The difference is mainly related to the parameters WB and WL. As an example, the values WB and WL are given for an 8-pins wide (extended) SOIC package.

mini-SOIC

Another SOIC variant, available only for 8-pin and 10-pin ICs, is the mini-SOIC, also called micro-SOIC. This case is much smaller, with a pitch of only 0.5 mm. See the table for the 10-pin model. An excellent overview of different semiconductor packages is provided by National Semiconductor.

Small-outline J-leaded package (SOJ)

Small-outline J-leaded package (SOJ) is a version of SOIC with J-type leads instead of gull-wing leads.

Smaller form factors After SOIC came a family of smaller form factors with pin spacings less than 1.27 mm:

Thin small outline package (TSOP) Thin-shrink small outline package (TSSOP)

Shrink small-outline package (SSOP) Shrink small-outline package (SSOP) chips have "gull wing" leads protruding from the two long sides, and a lead spacing of 0.65 mm (0.0256 inches) or 0.635 mm (0.025 inches ). 0.5 mm lead spacing is less common, but not rare. The body size of a SOP was compressed and the lead pitch tightened to obtain a smaller version SOP. This yields an IC package with a significant reduction in the size compared to standard package. All IC assembly processes remain the same as with standard SOPs. Applications for a SSOP enable end-products (pagers, portable audio/video, disc drives, radio, RF devices/components, telecom) to be reduced in size and mass. Semiconductor families such as operational amplifiers, drivers, optoelectronics, controllers, logic, analog, memory, comparators and more using BiCMOS, CMOS or other silicon / GaAs technologies are well addressed by the SSOP product family.

Thin small-outline package (TSOP)

A thin small-outline package (TSOP) is a rectangular, thin-bodied component. A Type I TSOP has legs protruding from the width portion of the package. A Type II TSOP has the legs protruding from the length portion of the package. The ICs on DRAM memory modules were usually TSOPs until they were replaced by ball grid array (BGA).

Thin-shrink small-outline package (TSSOP)

A thin-shrink small-outline package (TSSOP) is a rectangular, thin-body component. A TSSOP's leg count can range from 8 to 64. TSSOPs are particularly suited for gate drivers, controllers, wireless / RF, op-amps, logic, analog, ASICs, memory (EPROM, E2PROM), comparators and optoelectronics. Memory modules, disk drives, recordable optical disks, telephone handsets, speed dialers, video / audio and consumer electronics / appliances are suggested uses for TSSOP packaging.

Exposed pad The exposed pad (EP) variant of small outline packages can increase heat dissipation by as much as 1.5 times over a standard TSSOP, thereby expanding the margin of operating parameters. Additionally, the exposed pad can be connected to ground, thereby reducing loop inductance for high-frequency applications. The exposed pad should be soldered directly to the PCB to realize the thermal and electrical benefits.

References

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Illustrations

Small outline integrated circuit: A general SOIC, with major dimensions — A general SOIC, with major dimensions

Worked examples

Example 1 — a first encounter with Small outline integrated circuit

Start with the simplest possible case. Write down what Small outline integrated circuit claims or describes in one sentence, then invent the smallest concrete situation in which that sentence is true. In engineering, the smallest case is usually a single object, a single equation or a single measurement. Check that every symbol or term in your sentence has a meaning in that case.

Example 2 — changing one variable

Take the situation from Example 1 and change exactly one quantity: double it, halve it, or set it to zero. Predict what should happen to Small outline integrated circuit before you calculate. Comparing your prediction with the result is the fastest way to find out whether you understand the idea or only the words.

Example 3 — an exam-style question

Typical questions about Small outline integrated circuit ask you to (a) state it precisely, (b) apply it to given data, and (c) explain a limitation. Practise writing all three answers in under five minutes; the third part is what separates a full-mark answer from an average one.

Applications of Small outline integrated circuit

In research: Small outline integrated circuit appears in engineering research whenever the underlying quantities have to be modelled precisely. Papers usually cite it as a starting assumption and then explore where it breaks down.
In technology and industry: Engineering practice reuses Small outline integrated circuit in design rules, simulations and safety margins. Knowing the idea lets you read a specification sheet and understand why the numbers look the way they do.
In the classroom: Small outline integrated circuit is common in secondary-school and first-year university syllabi. It links to neighbouring topics Chip carriers, so understanding it makes those chapters shorter.
In everyday life: Look for Small outline integrated circuit outside the textbook — in sport, cooking, traffic, electronics or the sky above you. An example you found yourself is remembered far longer than one you were given.

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How to study Small outline integrated circuit in 20 minutes

Read the reference excerpt below once, without taking notes.
Close the page and write down what Small outline integrated circuit means in your own words.
Compare your version with the excerpt and mark what you missed.
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Frequently asked questions

What is Small outline integrated circuit in simple terms?

Why does Small outline integrated circuit matter?

Because it connects several engineering ideas at once: it gives you a definition you can apply, a quantity you can calculate, and a way to check whether a result is plausible.

How should I study Small outline integrated circuit?

Read the excerpt, restate it from memory, then work through the examples and applications listed on this page. The five-step study plan above takes about twenty minutes.

What does this page cover?

It gives you a compact reference excerpt plus original lgStudy explanations, examples, applications and study material on Small outline integrated circuit.