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Structured ASIC platform

Structured ASIC platform is a engineering topic covered in the lgStudy science library. This page brings together a partial reference excerpt, illustrations, worked examples, real-world applications and a short study plan, so you can understand Structured ASIC platform rather than just read about it. In short: Structured ASIC is an intermediate technology between ASIC and FPGA, offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease.

Key takeaways

  • Structured ASIC platform belongs to engineering; place it in that map before memorising details.
  • Learn the definition first, then one example that makes the definition concrete.
  • Connect Structured ASIC platform to a quantity you can measure, compute or draw — that is where exam questions come from.
  • Reproduce the core statement of Structured ASIC platform from memory before moving on to harder problems.

Reference excerpt

Structured ASIC is an intermediate technology between ASIC and FPGA, offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease. In a FPGA, interconnects and logic blocks are programmable after fabrication, offering high flexibility of design and ease of debugging in prototyping. However, the capability of FPGAs to implement large circuits is limited, in both size and speed, due to complexity in programmable routing, and significant space occupied by programming elements, e.g. SRAMs, MUXes. On the other hand, ASIC design flow is expensive. Every different design needs a complete different set of masks. The structured ASIC is a solution between these two. It has basically the same structure as a FPGA, but being mask-programmable instead of field-programmable, by configuring one or several via layers between metal layers. Every SRAM configuration bit can be replaced by a choice of putting a via or not between metal contacts. A number of commercial vendors have introduced structured ASIC products. They have a wide range of configurability, from a single via layer to 6 metal and 6 via layers. Altera's Hardcopy-II, eASIC's Nextreme are examples of commercial structured ASICs.

See also Gate array Altera Corp - "HardCopy II Structured ASICs" eASIC Corp - "Nextreme Structured ASIC"

References Chun Hok Ho et al. - "Floating Point FPGA: Architecture and Modelling" Chun Hok Ho et al. - "DOMAIN-SPECIFIC HYBRID FPGA: ARCHITECTURE AND FLOATING POINT APPLICATIONS" Steve Wilton et al. - "A Synthesizable Datapath-Oriented Embedded FPGA Fabric" Steve Wilton et al. - "A Synthesizable Datapath-Oriented Embedded FPGA Fabric for Silicon Debug Applications" Andy Ye and Jonathan Rose - "Using Bus-Based Connections to Improve Field-Programmable Gate Array Density for Implementing Datapath Circuits" Ian Kuon, Aaron Egier and Jonathan Rose - "Design, Layout and Verification of an FPGA using Automated Tools" Ian Kuon, Russell Tessier and Jonathan Rose - "FPGA Architecture: Survey and Challenges" Ian Kuon and Jonathan Rose - "Measuring the Gap Between FPGAs and ASICs" Stephane Badel and Elizabeth J. Brauer - "Implementation of Structured ASIC Fabric Using Via-Programmable Differential MCML Cells" Kanupriya Gulati, Nikhil Jayakumar and Sunil P. Khatri - "A Structured ASIC Design Approach Using Pass Transistor Logic" Hee Kong Phoon, Matthew Yap and Chuan Khye Chai - "A Highly Compatible Architecture Design for Optimum FPGA to Structured-ASIC Migration" Yajun Ran and Malgorzata Marek-Sadowska - "Designing Via-Configurable Logic Blocks for Regular Fabric" R. Reed Taylor and Herman Schrnit - "Creating a Power-aware Structured ASIC" Jennifer L. Wong, Farinaz Kourshanfar and Miodrag Potkonjak - "Flexible ASIC: Shared Masking for Multiple Media Processors" External Links: eda.ee.ucla.edu/EE201A-04Spring/ASICslides.ppt

Worked examples

Example 1 — a first encounter with Structured ASIC platform

Start with the simplest possible case. Write down what Structured ASIC platform claims or describes in one sentence, then invent the smallest concrete situation in which that sentence is true. In engineering, the smallest case is usually a single object, a single equation or a single measurement. Check that every symbol or term in your sentence has a meaning in that case.

Example 2 — changing one variable

Take the situation from Example 1 and change exactly one quantity: double it, halve it, or set it to zero. Predict what should happen to Structured ASIC platform before you calculate. Comparing your prediction with the result is the fastest way to find out whether you understand the idea or only the words.

Example 3 — an exam-style question

Typical questions about Structured ASIC platform ask you to (a) state it precisely, (b) apply it to given data, and (c) explain a limitation. Practise writing all three answers in under five minutes; the third part is what separates a full-mark answer from an average one.

Applications of Structured ASIC platform

In research
Structured ASIC platform appears in engineering research whenever the underlying quantities have to be modelled precisely. Papers usually cite it as a starting assumption and then explore where it breaks down.
In technology and industry
Engineering practice reuses Structured ASIC platform in design rules, simulations and safety margins. Knowing the idea lets you read a specification sheet and understand why the numbers look the way they do.
In the classroom
Structured ASIC platform is common in secondary-school and first-year university syllabi. It links to neighbouring topics Application-specific integrated circuits, Electronic circuits, Logic design, so understanding it makes those chapters shorter.
In everyday life
Look for Structured ASIC platform outside the textbook — in sport, cooking, traffic, electronics or the sky above you. An example you found yourself is remembered far longer than one you were given.

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How to study Structured ASIC platform in 20 minutes

  1. Read the reference excerpt below once, without taking notes.
  2. Close the page and write down what Structured ASIC platform means in your own words.
  3. Compare your version with the excerpt and mark what you missed.
  4. Work through the three examples above with pen and paper.
  5. Explain Structured ASIC platform out loud to somebody else — or to Teacher Smith in the lgStudy chat.

Frequently asked questions

What is Structured ASIC platform in simple terms?

Structured ASIC is an intermediate technology between ASIC and FPGA, offering high performance, a characteristic of ASIC, and low NRE cost, a characteristic of FPGA. Using structured ASIC allows products to be introduced quickly to market, to have lower cost and to be designed with ease.

Why does Structured ASIC platform matter?

Because it connects several engineering ideas at once: it gives you a definition you can apply, a quantity you can calculate, and a way to check whether a result is plausible.

How should I study Structured ASIC platform?

Read the excerpt, restate it from memory, then work through the examples and applications listed on this page. The five-step study plan above takes about twenty minutes.

What does this page cover?

It gives you a compact reference excerpt plus original lgStudy explanations, examples, applications and study material on Structured ASIC platform.

Tags

  • Application-specific integrated circuits
  • Electronic circuits
  • Logic design

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