The VLSI Project was a DARPA-program initiated by Robert Kahn in 1978 that provided research funding to a wide variety of university-based teams in an effort to improve the state of the art in microprocessor design, then known as Very Large Scale Integration (VLSI). The VLSI Project is one of the most influential research projects in modern computer history. Its offspring include Berkeley Software Distribution (BSD) Unix, the reduced instruction set computer (RISC) processor concept, many computer-aided design (CAD) tools still in use today, 32-bit graphics workstation, fabless manufacturing and design houses, and its own semiconductor fabrication plant (fab), MOSIS, starting in 1981. A similar DARPA project partnering with industry, VHSIC had little or no impact. The VLSI Project was central in promoting the Mead and Conway revolution throughout industry.
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New design rules In 1975, Carver Mead, Tom Everhart and Ivan Sutherland of Caltech wrote a report for ARPA on the topic of microelectronics. Over the previous few years, Mead had coined the term "Moore's law" to describe Gordon Moore's 1965 prediction for the growth rate of complexity, and in 1974, Robert Dennard of IBM noted that the scale shrinking that formed the basis of Moore's law also affected the performance of the systems. These combined effects implied a massive increase in computing power was about to be unleashed on the industry. The report, published in 1976, suggested that ARPA fund development across a number of fields in order to deal with the complexity that was about to appear due to these "very-large-scale integrated circuits". Later that year, Sutherland wrote a letter to his brother Bert who was at that time working at Xerox PARC. He suggested a joint effort between PARC and Caltech to begin studying these issues. Bert agreed to form a team, inviting Lynn Conway and Doug Fairbairn to join. Conway had previously worked at IBM on a supercomputer project known as ACS-1. After considering the notes from Mead, Conway realized that the rapid scaling of CMOS being predicted would allow it to surpass the otherwise faster ECL systems used on larger systems as the feature sizes shrank and Dennard's speed predictions kicked in. It also implied that the entire ACS-1 mainframe would one day fit on a single chip. In 1976, Sutherland and Mead wrote an article in Scientific American on the challenges presented by the new complexity. At the time, microprocessor design was plateauing at the 100,000 transistor level because the tools available to the designers were simply unable to deal with more complex designs. 16-bit and 16/32-bit designs were coming to market, but beyond that seemed too difficult and expensive to contemplate. Mead and Conway felt that there was no theoretical problem impeding progress, simply a number of practical ones, and set about solving these in order to make much more complex designs possible. Simply put, the solution was to simplify everything, inventing new practical rules-of-thumb for designers and applying computers to the problems that were larger. This process was aided by the recent introduction of depletion mode NMOS logic, which greatly simplified the conceptual model of the active elements. The mid-1970s were a period of rapid change as new processes were being introduced at different companies at a rapid pace. Each new process led to a set of design rules that often ran to 40 pages. These would include details like "do not place to parallel lines on the metallization layer (MET) that are closer than 2 micrometers apart". Dozens of such rules were developed for each layer to squeeze out maximum performance. In early 1977, Conway began developing a new set of completely generic rules. These would not offer the highest performance possible for any given system, but her concept was that it would so greatly reduce design time that it could be adapted to a new underling fabrication technology with little or no changes, and such a move would offer many times the performance benefit that using every published trick of the existing rules would. Starting with three colored whiteboard pens representing each of the types of layers, MET, POLY, DIFF, Conway developed a set of design rules that worked on every current process. Further development led to the realization that all of the dimensions could be expressed as multiples of some fundamental minimum feature size possible using that process, which became known as λ (the Greek letter lambda). λ was set to be one half of the minimum width of a line of POLY or DIFF, and the rules expressed in those terms; "a line has to be two λ wide", "two lines on the same layer must be at least three λ apart", "lines on different layers must be one λ apart" and so forth. The end result was a short set of design rules that applied at any scale. Conway later noted "I vividly recall seeing Mead's jaw drop that spring morning in 1977 as I presented my strategy for λ-based rules on my whiteboard at PARC."
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