The Zilog Z8000 is a 16-bit microprocessor architecture designed by Zilog and introduced in early 1979. Two chips were initially released, differing only in the width of the address bus; the Z8001 had a 23-bit bus while the Z8002 had a 16-bit bus. Bernard Peuto designed the architecture, while Masatoshi Shima did the logic and physical implementation, assisted by a small group. In contrast to most designs of the era, the Z8000 does not use microcode, which allowed it to be implemented in only 17,500 transistors. The Z8000 is not Z80-compatible, but includes a number of design elements from it, such as combining two registers into one with twice the number of bits. The Z8000 expanded on the Z80 by allowing two 16-bit registers to operate as a 32-bit register, or four to operate as a 64-bit register. Although it saw some use in the early 1980s, it was never as popular as the Z80. It was released after the 16-bit 8086 (April 1978) and at the same time as the less-expensive 8088, and only months before the 68000 (September 1979) with a 32-bit instruction set architecture, which is roughly twice as fast. The Z80000 was a 32-bit follow-on design that made it to a test sampling phase in 1986 without ever being released commercially.
History
Z80 In the early 1970s, Intel's management saw the microprocessor not so much as a product on its own, but as a way to create demand for their other products like static RAM and ROM. A reorganization in early 1974 further diluted the role of the microprocessor in the company. The designer of the Intel 4004 and Intel 8080, Federico Faggin, decided to leave the company and start one dedicated to microprocessor design. Faggin left on 31 October 1974, joined by Ralph Ungermann and, later, the logic designer Masatoshi Shima. Initially working on a concept for a simple microcontroller, Faggin eventually concluded that the economics of the industry demanded that they introduce a product at the high-end, not the low-end. This led to a new concept initially known as the "Super 80", but eventually emerging as the Zilog Z80. The Z80 was a significant advance on the 8080, running on a single +5V power supply and adding several nice features from the Motorola 6800. Released in 1976, it was soon a huge hit.
16-bit design While Shima was still working on the Z80 layout, Faggin began considering its future replacement by a 16-bit design, with the goal of being the first company to bring a new 16-bit single-chip design to market. Several multi-chip 16-bit microprocessors existed by this point, but they were all based on existing minicomputer designs and were generally too expensive for general use. Single-chip versions of these emerged, but they remained expensive. He felt that expanding the Z80 to 16-bits was not appropriate; the larger computer word size meant that many more features could be offered in the instruction set, and the deliberately simple instructions of earlier designs would lead to chips that would be outperformed by freshly-designed 16-bit designs. In January 1976, Faggin hired Bernard Peuto, formerly of Amdahl Corporation. Peuto had previously studied and published extensively on the topic of word length, instruction sets and code density. The initial meetings on the concept were held at the end of March, at which time Faggin told Peuto he wanted the architecture completed in three months. Peuto's design included the ability to work with 8-, 16- and 32-bit data, flexible addressing modes, and dedicated coprocessor support. The instruction set was delivered on time, but then it was time to turn that into a complete design. It was during this time that Ungermann explained the economics of the chip industry to Peuto, which were strongly influenced by the size of the chip. At the time, most processors used 40-pin dual in-line packages (DIPs), but some used 28-pin packages for lower-cost systems, while others used 48 or 64-pin packages for more powerful systems like minicomputers. The need to balance cost and power ultimately led to the idea of having two versions of the chip, the Z8001 with 23 address bus pins in a 48-pin chip, and the Z8002 with 16 address pins in a 40-pin chip. In order to have a single instruction set that could be used on either design, they made the decision to use segmented memory. In this concept, the basic instruction set uses 16-bit addresses, which could then be run on either version of the chip. To access larger amounts of memory, a separate set of instructions could set a 7-bit "segment number". On the 23-pin versions, the 7-bit segment number was sent out at the same time as the 16-bit base address, creating a single 23-bit address. This early design choice would ultimately have a profound effect on the desirability of the Z8000 series. Shima would be responsible for turning the conceptual design into a physical one, and with the basic design completed, Shima first began considering it on 11 June 1976. At the time, the system was to have eight 16-bit registers, and Shima began laying out such a design. But very late in the process, the design team concluded that it needed more, and when they asked in October, Shima stated he had laid it out with enough room left over that they could double the number of registers.
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